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| author | Taylor Simpson <tsimpson@quicinc.com> | 2022-02-09 18:15:54 -0800 |
|---|---|---|
| committer | Taylor Simpson <tsimpson@quicinc.com> | 2022-03-12 09:14:22 -0800 |
| commit | 3977ba3078503fca0f182aa8a39fad2388f43cb1 (patch) | |
| tree | 3876717d5b06510518f233f36bcf8077650458e2 | |
| parent | 8af2d9978ad2c52377fe69466a556fffeedcd057 (diff) | |
| download | focaccia-qemu-3977ba3078503fca0f182aa8a39fad2388f43cb1.tar.gz focaccia-qemu-3977ba3078503fca0f182aa8a39fad2388f43cb1.zip | |
Hexagon (target/hexagon) fix bug in conv_df2uw_chop
Fix typo that checked for 32 bit nan instead of 64 bit Test case added in tests/tcg/hexagon/usr.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220210021556.9217-11-tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/hexagon/op_helper.c | 2 | ||||
| -rw-r--r-- | tests/tcg/hexagon/usr.c | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 366caf9ec8..63e5ad5d68 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -829,7 +829,7 @@ uint32_t HELPER(conv_df2uw_chop)(CPUHexagonState *env, float64 RssV) uint32_t RdV; arch_fpop_start(env); /* Hexagon checks the sign before rounding */ - if (float64_is_neg(RssV) && !float32_is_any_nan(RssV)) { + if (float64_is_neg(RssV) && !float64_is_any_nan(RssV)) { float_raise(float_flag_invalid, &env->fp_status); RdV = 0; } else { diff --git a/tests/tcg/hexagon/usr.c b/tests/tcg/hexagon/usr.c index 11415f8295..a531511cec 100644 --- a/tests/tcg/hexagon/usr.c +++ b/tests/tcg/hexagon/usr.c @@ -1068,6 +1068,10 @@ int main() TEST_P_OP_P(conv_df2d, DF_SNaN, 0xffffffffffffffffULL, USR_FPINVF); TEST_R_OP_P(conv_df2uw_chop, DF_QNaN, 0xffffffff, USR_FPINVF); TEST_R_OP_P(conv_df2uw_chop, DF_SNaN, 0xffffffff, USR_FPINVF); + + /* Test for typo in HELPER(conv_df2uw_chop) */ + TEST_R_OP_P(conv_df2uw_chop, 0xffffff7f00000001ULL, 0xffffffff, USR_FPINVF); + TEST_R_OP_P(conv_df2w_chop, DF_QNaN, 0xffffffff, USR_FPINVF); TEST_R_OP_P(conv_df2w_chop, DF_SNaN, 0xffffffff, USR_FPINVF); TEST_P_OP_P(conv_df2ud_chop, DF_QNaN, 0xffffffffffffffffULL, USR_FPINVF); |