diff options
| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-02-24 14:45:17 -0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-01 17:40:12 -0800 |
| commit | 3c7d54f945f1b5b474ea35c0815a1618927c9384 (patch) | |
| tree | 7c04c1aea787857fde2cc24eea744c124365fdd3 | |
| parent | d4ea71170432fef9e8394ab33eac3cdc3a9540d3 (diff) | |
| download | focaccia-qemu-3c7d54f945f1b5b474ea35c0815a1618927c9384.tar.gz focaccia-qemu-3c7d54f945f1b5b474ea35c0815a1618927c9384.zip | |
target/riscv/csr.c: use env_archcpu() in ctr()
We don't need to use env_cpu() and CPUState(). Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230224174520.92490-2-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | target/riscv/csr.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 1b0a0c1693..d047d8b45c 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -108,8 +108,7 @@ static RISCVException vs(CPURISCVState *env, int csrno) static RISCVException ctr(CPURISCVState *env, int csrno) { #if !defined(CONFIG_USER_ONLY) - CPUState *cs = env_cpu(env); - RISCVCPU *cpu = RISCV_CPU(cs); + RISCVCPU *cpu = env_archcpu(env); int ctr_index; target_ulong ctr_mask; int base_csrno = CSR_CYCLE; |