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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-13 17:11:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-08-25 10:48:48 +0100 |
| commit | 3f4f1880c245453b75d4c09049845b19de9964bf (patch) | |
| tree | ddbd59a43791d80d5e929ca9e40f4185c042a7e7 | |
| parent | fdcf2269c4e0e4f5ca3a389290a71d7aa98bd5c7 (diff) | |
| download | focaccia-qemu-3f4f1880c245453b75d4c09049845b19de9964bf.tar.gz focaccia-qemu-3f4f1880c245453b75d4c09049845b19de9964bf.zip | |
target/arm: Fix calculation of LTP mask when LR is 0
In mve_element_mask(), we calculate a mask for tail predication which should have a number of 1 bits based on the value of LR. However, our MAKE_64BIT_MASK() macro has undefined behaviour when passed a zero length. Special case this to give the all-zeroes mask we require. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/arm/mve_helper.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c index 1a4b2ef807..bc67b86e70 100644 --- a/target/arm/mve_helper.c +++ b/target/arm/mve_helper.c @@ -64,7 +64,8 @@ static uint16_t mve_element_mask(CPUARMState *env) */ int masklen = env->regs[14] << env->v7m.ltpsize; assert(masklen <= 16); - mask &= MAKE_64BIT_MASK(0, masklen); + uint16_t ltpmask = masklen ? MAKE_64BIT_MASK(0, masklen) : 0; + mask &= ltpmask; } if ((env->condexec_bits & 0xf) == 0) { |