diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-09-24 23:45:54 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-06 15:46:18 +0100 |
| commit | 415aae543edad19eda8f66955dde386c7fd7c680 (patch) | |
| tree | cffd865c848488e940f34055b8c2df1c44a70b30 | |
| parent | 2c9e8ddd769959e899206b4cdea466ba5845e0bc (diff) | |
| download | focaccia-qemu-415aae543edad19eda8f66955dde386c7fd7c680.tar.gz focaccia-qemu-415aae543edad19eda8f66955dde386c7fd7c680.zip | |
target/microblaze: Consider endianness while translating code
Consider the CPU ENDI bit, swap instructions when the CPU endianness doesn't match the binary one. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241105130431.22564-17-philmd@linaro.org>
| -rw-r--r-- | target/microblaze/cpu.h | 7 | ||||
| -rw-r--r-- | target/microblaze/translate.c | 5 |
2 files changed, 10 insertions, 2 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index f6879eee35..e44ddd5307 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -414,6 +414,13 @@ void mb_translate_code(CPUState *cs, TranslationBlock *tb, /* Ensure there is no overlap between the two masks. */ QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK); +static inline bool mb_cpu_is_big_endian(CPUState *cs) +{ + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + + return !cpu->cfg.endi; +} + static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc, uint64_t *cs_base, uint32_t *flags) { diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index b5389d65b2..b54e5ac4b2 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -710,7 +710,7 @@ static void record_unaligned_ess(DisasContext *dc, int rd, static inline MemOp mo_endian(DisasContext *dc) { - return MO_TE; + return dc->cfg->endi ? MO_LE : MO_BE; } static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop, @@ -1647,7 +1647,8 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) dc->tb_flags_to_set = 0; - ir = translator_ldl(cpu_env(cs), &dc->base, dc->base.pc_next); + ir = translator_ldl_swap(cpu_env(cs), &dc->base, dc->base.pc_next, + mb_cpu_is_big_endian(cs) != TARGET_BIG_ENDIAN); if (!decode(dc, ir)) { trap_illegal(dc, true); } |