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authorPeter Maydell <peter.maydell@linaro.org>2018-11-13 10:47:59 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-11-13 10:47:59 +0000
commit436c0cbbeb38dd97c02fe921a7cb253a18afdd86 (patch)
treef3a51e994dc3ec89ca973a331151e1e1ae1d54be
parent593cfa2b637b92d37eef949653840dc065cdb960 (diff)
downloadfocaccia-qemu-436c0cbbeb38dd97c02fe921a7cb253a18afdd86.tar.gz
focaccia-qemu-436c0cbbeb38dd97c02fe921a7cb253a18afdd86.zip
target/arm/cpu: Give Cortex-A15 and -A7 the EL2 feature
The Cortex-A15 and Cortex-A7 both have EL2; now we've implemented
it properly we can enable the feature bit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20181109173553.22341-3-peter.maydell@linaro.org
-rw-r--r--target/arm/cpu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 858a70872a..60411f6bfe 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1650,6 +1650,7 @@ static void cortex_a7_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
     set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
     set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
+    set_feature(&cpu->env, ARM_FEATURE_EL2);
     set_feature(&cpu->env, ARM_FEATURE_EL3);
     cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7;
     cpu->midr = 0x410fc075;
@@ -1696,6 +1697,7 @@ static void cortex_a15_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
     set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
     set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
+    set_feature(&cpu->env, ARM_FEATURE_EL2);
     set_feature(&cpu->env, ARM_FEATURE_EL3);
     cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
     cpu->midr = 0x412fc0f1;