diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-01-27 19:25:42 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-02-05 10:24:14 -1000 |
| commit | 43c8a4027953b170f718bb8507f2494f8279c24c (patch) | |
| tree | 9d282e8df90da59f660b56023d602def00e7837e | |
| parent | 475a15611f1581f6d395c0be683dfa8893fe7d88 (diff) | |
| download | focaccia-qemu-43c8a4027953b170f718bb8507f2494f8279c24c.tar.gz focaccia-qemu-43c8a4027953b170f718bb8507f2494f8279c24c.zip | |
tcg/tci: Inline tci_write_reg16 into the only caller
Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | tcg/tci.c | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/tcg/tci.c b/tcg/tci.c index 740244cc54..005d2946c4 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -117,14 +117,6 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) regs[index] = value; } -#if TCG_TARGET_REG_BITS == 64 -static void -tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) -{ - tci_write_reg(regs, index, value); -} -#endif - static void tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) { @@ -879,7 +871,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, t0 = *tb_ptr++; t1 = tci_read_r(regs, &tb_ptr); t2 = tci_read_s32(&tb_ptr); - tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); + tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); break; case INDEX_op_ld16s_i64: TODO(); |