diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-06 18:16:08 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-06 18:16:08 +0000 |
| commit | 43e9e742b96ce2e94e76b53e96db3e22df3c4083 (patch) | |
| tree | c9232c0c097f717fe781fc3cd2af943742445362 | |
| parent | 01b1fa6d16c4def89ef4dc94d0a37d6d220d5fa0 (diff) | |
| download | focaccia-qemu-43e9e742b96ce2e94e76b53e96db3e22df3c4083.tar.gz focaccia-qemu-43e9e742b96ce2e94e76b53e96db3e22df3c4083.zip | |
Fix I/D MMU tag reads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-sparc/op_helper.c | 58 |
1 files changed, 4 insertions, 54 deletions
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index 40cdf6ee2c..f8f94ac39a 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -1674,34 +1674,9 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) } case 0x56: // I-MMU tag read { - unsigned int i; + int reg = (addr >> 3) & 0x3f; - for (i = 0; i < 64; i++) { - // Valid, ctx match, vaddr match - if ((env->itlb_tte[i] & 0x8000000000000000ULL) != 0) { - uint64_t mask; - - switch ((env->itlb_tte[i] >> 61) & 3) { - default: - case 0x0: - mask = 0xffffffffffffffff; - break; - case 0x1: - mask = 0xffffffffffff0fff; - break; - case 0x2: - mask = 0xfffffffffff80fff; - break; - case 0x3: - mask = 0xffffffffffc00fff; - break; - } - if ((env->itlb_tag[i] & mask) == (addr & mask)) { - ret = env->itlb_tte[i]; - break; - } - } - } + ret = env->itlb_tag[reg]; break; } case 0x58: // D-MMU regs @@ -1720,34 +1695,9 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) } case 0x5e: // D-MMU tag read { - unsigned int i; + int reg = (addr >> 3) & 0x3f; - for (i = 0; i < 64; i++) { - // Valid, ctx match, vaddr match - if ((env->dtlb_tte[i] & 0x8000000000000000ULL) != 0) { - uint64_t mask; - - switch ((env->dtlb_tte[i] >> 61) & 3) { - default: - case 0x0: - mask = 0xffffffffffffffff; - break; - case 0x1: - mask = 0xffffffffffff0fff; - break; - case 0x2: - mask = 0xfffffffffff80fff; - break; - case 0x3: - mask = 0xffffffffffc00fff; - break; - } - if ((env->dtlb_tag[i] & mask) == (addr & mask)) { - ret = env->dtlb_tte[i]; - break; - } - } - } + ret = env->dtlb_tag[reg]; break; } case 0x46: // D-cache data |