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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-04-01 10:09:34 +0200
committerRichard Henderson <richard.henderson@linaro.org>2025-04-23 15:04:57 -0700
commit46708ccec1cd4bb2c022bf97a67affb5a4bea6f7 (patch)
treee23b84aba47ee0bd9c66e51cfe9cd6298688d451
parentf34769a536c80753442f14f40387e2a4c936fd67 (diff)
downloadfocaccia-qemu-46708ccec1cd4bb2c022bf97a67affb5a4bea6f7.tar.gz
focaccia-qemu-46708ccec1cd4bb2c022bf97a67affb5a4bea6f7.zip
target/tricore: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-22-philmd@linaro.org>
-rw-r--r--target/tricore/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 16acc4ecb9..833a93d37a 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -176,6 +176,7 @@ static const TCGCPUOps tricore_tcg_ops = {
     .translate_code = tricore_translate_code,
     .synchronize_from_tb = tricore_cpu_synchronize_from_tb,
     .restore_state_to_opc = tricore_restore_state_to_opc,
+    .mmu_index = tricore_cpu_mmu_index,
     .tlb_fill = tricore_cpu_tlb_fill,
     .cpu_exec_interrupt = tricore_cpu_exec_interrupt,
     .cpu_exec_halt = tricore_cpu_has_work,
@@ -194,7 +195,6 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
     resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL,
                                        &mcc->parent_phases);
     cc->class_by_name = tricore_cpu_class_by_name;
-    cc->mmu_index = tricore_cpu_mmu_index;
 
     cc->gdb_read_register = tricore_cpu_gdb_read_register;
     cc->gdb_write_register = tricore_cpu_gdb_write_register;