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| author | Bernhard Beschow <shentey@gmail.com> | 2025-02-23 12:46:56 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-25 17:02:14 +0000 |
| commit | 487967bed65083db33561edc1255ced422bfbff5 (patch) | |
| tree | 50770d154807e9b3e576491ef94b665dde98c03f | |
| parent | 86c2dff9552ad5a9b2febf329a2dbd2620bc2145 (diff) | |
| download | focaccia-qemu-487967bed65083db33561edc1255ced422bfbff5.tar.gz focaccia-qemu-487967bed65083db33561edc1255ced422bfbff5.zip | |
hw/arm/fsl-imx8mp: Add SNVS
SNVS contains an RTC which allows Linux to deal correctly with time. This is particularly useful when handling persistent storage which will be done in the next patch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-7-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | docs/system/arm/imx8mp-evk.rst | 1 | ||||
| -rw-r--r-- | hw/arm/fsl-imx8mp.c | 10 | ||||
| -rw-r--r-- | include/hw/arm/fsl-imx8mp.h | 2 |
3 files changed, 13 insertions, 0 deletions
diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp-evk.rst index f0df346113..22541c5442 100644 --- a/docs/system/arm/imx8mp-evk.rst +++ b/docs/system/arm/imx8mp-evk.rst @@ -12,6 +12,7 @@ The ``imx8mp-evk`` machine implements the following devices: * Up to 4 Cortex-A53 cores * Generic Interrupt Controller (GICv3) * 4 UARTs + * Secure Non-Volatile Storage (SNVS) including an RTC * Clock Tree Boot options diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c index bc15b25ca1..18c9c54ddc 100644 --- a/hw/arm/fsl-imx8mp.c +++ b/hw/arm/fsl-imx8mp.c @@ -201,6 +201,8 @@ static void fsl_imx8mp_init(Object *obj) object_initialize_child(obj, "analog", &s->analog, TYPE_IMX8MP_ANALOG); + object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS); + for (i = 0; i < FSL_IMX8MP_NUM_UARTS; i++) { g_autofree char *name = g_strdup_printf("uart%d", i + 1); object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL); @@ -344,6 +346,13 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(gicdev, serial_table[i].irq)); } + /* SNVS */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) { + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, + fsl_imx8mp_memmap[FSL_IMX8MP_SNVS_HP].addr); + /* Unimplemented devices */ for (i = 0; i < ARRAY_SIZE(fsl_imx8mp_memmap); i++) { switch (i) { @@ -352,6 +361,7 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp) case FSL_IMX8MP_GIC_DIST: case FSL_IMX8MP_GIC_REDIST: case FSL_IMX8MP_RAM: + case FSL_IMX8MP_SNVS_HP: case FSL_IMX8MP_UART1 ... FSL_IMX8MP_UART4: /* device implemented and treated above */ break; diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h index ce5188e7f2..26e24e99a1 100644 --- a/include/hw/arm/fsl-imx8mp.h +++ b/include/hw/arm/fsl-imx8mp.h @@ -12,6 +12,7 @@ #include "cpu.h" #include "hw/char/imx_serial.h" #include "hw/intc/arm_gicv3_common.h" +#include "hw/misc/imx7_snvs.h" #include "hw/misc/imx8mp_analog.h" #include "hw/misc/imx8mp_ccm.h" #include "qom/object.h" @@ -36,6 +37,7 @@ struct FslImx8mpState { GICv3State gic; IMX8MPCCMState ccm; IMX8MPAnalogState analog; + IMX7SNVSState snvs; IMXSerialState uart[FSL_IMX8MP_NUM_UARTS]; }; |