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| author | Sven Schnelle <svens@stackframe.org> | 2024-03-19 17:19:21 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-03-19 14:08:02 -1000 |
| commit | 518d2f4300e5c50a3e6416fd46e58373781a5267 (patch) | |
| tree | d4d759d99c36d51640268910f221436fe766ff27 | |
| parent | b5e0b3a53c983c4a9620a44a6a557b389e589218 (diff) | |
| download | focaccia-qemu-518d2f4300e5c50a3e6416fd46e58373781a5267.tar.gz focaccia-qemu-518d2f4300e5c50a3e6416fd46e58373781a5267.zip | |
target/hppa: fix do_stdby_e()
stdby,e,m was writing data from the wrong half of the register
into memory for cases 0-3.
Fixes: 25460fc5a71 ("target/hppa: Implement STDBY")
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240319161921.487080-7-svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/hppa/op_helper.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 480fe80844..6cf49f33b7 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -281,17 +281,17 @@ static void do_stdby_e(CPUHPPAState *env, target_ulong addr, uint64_t val, case 3: /* The 3 byte store must appear atomic. */ if (parallel) { - atomic_store_mask32(env, addr - 3, val, 0xffffff00u, ra); + atomic_store_mask32(env, addr - 3, val >> 32, 0xffffff00u, ra); } else { - cpu_stw_data_ra(env, addr - 3, val >> 16, ra); - cpu_stb_data_ra(env, addr - 1, val >> 8, ra); + cpu_stw_data_ra(env, addr - 3, val >> 48, ra); + cpu_stb_data_ra(env, addr - 1, val >> 40, ra); } break; case 2: - cpu_stw_data_ra(env, addr - 2, val >> 16, ra); + cpu_stw_data_ra(env, addr - 2, val >> 48, ra); break; case 1: - cpu_stb_data_ra(env, addr - 1, val >> 24, ra); + cpu_stb_data_ra(env, addr - 1, val >> 56, ra); break; default: /* Nothing is stored, but protection is checked and the |