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| author | James Hogan <james.hogan@imgtec.com> | 2017-08-02 10:59:16 +0100 |
|---|---|---|
| committer | Yongbok Kim <yongbok.kim@imgtec.com> | 2017-08-02 22:18:13 +0100 |
| commit | 51ca717b079dccae5b6cc9f45153f5044abd34f0 (patch) | |
| tree | f105b725e7ced6b7a5f631e59613fda42e11fa0b | |
| parent | b74cddcbf6063f684725e3f8bca49a68e30cba71 (diff) | |
| download | focaccia-qemu-51ca717b079dccae5b6cc9f45153f5044abd34f0.tar.gz focaccia-qemu-51ca717b079dccae5b6cc9f45153f5044abd34f0.zip | |
target/mips: Drop redundant gen_io_start/stop()
DMTC0 CP0_Cause does a redundant gen_io_start() and gen_io_end() pair,
even though this is done for all DMTC0 operations outside of the switch
statement. Remove these redundant calls.
Fixes: 5dc5d9f055c5 ("mips: more fixes to the MIPS interrupt glue logic")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
| -rw-r--r-- | target/mips/translate.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index ba6b8f567f..bcea2a149e 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7401,15 +7401,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) switch (sel) { case 0: save_cpu_state(ctx, 1); - /* Mark as an IO operation because we may trigger a software - interrupt. */ - if (ctx->tb->cflags & CF_USE_ICOUNT) { - gen_io_start(); - } gen_helper_mtc0_cause(cpu_env, arg); - if (ctx->tb->cflags & CF_USE_ICOUNT) { - gen_io_end(); - } /* Stop translation as we may have triggered an intetrupt. BS_STOP * isn't sufficient, we need to ensure we break out of translated * code to check for pending interrupts. */ |