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authorChristophe Lyon <christophe.lyon@st.com>2011-02-15 13:44:44 +0000
committerAurelien Jarno <aurelien@aurel32.net>2011-02-20 17:43:01 +0100
commit51e3930fc7ae8d3cff1ff0ecfdd63403b4c20f36 (patch)
tree63c315f9bd4113251dd0ad94944958f5fcffdf58
parentb6c63b9891f0b1415f96e027d5dc8a430c7ec153 (diff)
downloadfocaccia-qemu-51e3930fc7ae8d3cff1ff0ecfdd63403b4c20f36.tar.gz
focaccia-qemu-51e3930fc7ae8d3cff1ff0ecfdd63403b4c20f36.zip
target-arm: fix unsigned 64 bit right shifts.
Fix range of shift amounts which always give 0 as result.

Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-arm/neon_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 52ef994d2b..c97aa7dbd4 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -639,7 +639,7 @@ uint32_t HELPER(neon_rshl_u32)(uint32_t val, uint32_t shiftop)
 uint64_t HELPER(neon_rshl_u64)(uint64_t val, uint64_t shiftop)
 {
     int8_t shift = (uint8_t)shiftop;
-    if (shift >= 64 || shift < 64) {
+    if (shift >= 64 || shift < -64) {
         val = 0;
     } else if (shift == -64) {
         /* Rounding a 1-bit result just preserves that bit.  */