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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-02-09 08:49:43 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-02-15 15:53:12 +0100 |
| commit | 5235993f98f2842253b59d3ce786290b4644ca51 (patch) | |
| tree | 38400f4ff0f982e6cbd43db95a97bc741f27bf96 | |
| parent | addd0c28741df1a503a97a45e9dc4976ea8e0b9a (diff) | |
| download | focaccia-qemu-5235993f98f2842253b59d3ce786290b4644ca51.tar.gz focaccia-qemu-5235993f98f2842253b59d3ce786290b4644ca51.zip | |
target/mips: Remove CPUMIPSState::CP0_SAAR[2] field
Remove the unused CP0_SAAR[2] registers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-8-philmd@linaro.org>
| -rw-r--r-- | target/mips/cpu.h | 1 | ||||
| -rw-r--r-- | target/mips/sysemu/machine.c | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index ef1d9f279c..5e97b5b422 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -749,7 +749,6 @@ typedef struct CPUArchState { int32_t CP0_Count; uint32_t CP0_SAARI; #define CP0SAARI_TARGET 0 /* 5..0 */ - uint64_t CP0_SAAR[2]; #define CP0SAAR_BASE 12 /* 43..12 */ #define CP0SAAR_SIZE 1 /* 5..1 */ #define CP0SAAR_EN 0 diff --git a/target/mips/sysemu/machine.c b/target/mips/sysemu/machine.c index 218f4c3a67..6d1299a89e 100644 --- a/target/mips/sysemu/machine.c +++ b/target/mips/sysemu/machine.c @@ -282,7 +282,7 @@ const VMStateDescription vmstate_mips_cpu = { VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU), VMSTATE_INT32(env.CP0_Count, MIPSCPU), VMSTATE_UINT32(env.CP0_SAARI, MIPSCPU), - VMSTATE_UINT64_ARRAY(env.CP0_SAAR, MIPSCPU, 2), + VMSTATE_UNUSED(2 * sizeof(uint64_t)), /* was CP0_SAAR[2] */ VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU), VMSTATE_INT32(env.CP0_Compare, MIPSCPU), VMSTATE_INT32(env.CP0_Status, MIPSCPU), |