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| author | Craig Janeczek <jancraig@amazon.com> | 2018-10-19 17:34:28 +0200 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-10-29 14:13:53 +0100 |
| commit | 53f1131fde02ae49e1f794f811a60fda32c72dca (patch) | |
| tree | 95b09b2fa79ca944c947d981d1f1b4f7f329b67c | |
| parent | a35723f4ce026ebad0c34f18ea874813799058f0 (diff) | |
| download | focaccia-qemu-53f1131fde02ae49e1f794f811a60fda32c72dca.tar.gz focaccia-qemu-53f1131fde02ae49e1f794f811a60fda32c72dca.zip | |
target/mips: Add bit encoding for MXU operand getting pattern 'optn3'
Add bit encoding for MXU operand getting pattern 'optn3'. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Craig Janeczek <jancraig@amazon.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
| -rw-r--r-- | target/mips/translate.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 16bb9e0a74..ccabd13c94 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24001,6 +24001,16 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) #define MXU_OPTN2_HW 2 #define MXU_OPTN2_XW 3 +/* MXU operand getting pattern 'optn3' */ +#define MXU_OPTN3_PTN0 0 +#define MXU_OPTN3_PTN1 1 +#define MXU_OPTN3_PTN2 2 +#define MXU_OPTN3_PTN3 3 +#define MXU_OPTN3_PTN4 4 +#define MXU_OPTN3_PTN5 5 +#define MXU_OPTN3_PTN6 6 +#define MXU_OPTN3_PTN7 7 + /* * |