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authorRichard Henderson <rth@twiddle.net>2010-01-05 16:03:00 -0800
committerAurelien Jarno <aurelien@aurel32.net>2010-01-14 18:16:40 +0100
commit5716990376e22e758c434ba7092b8eacaa148973 (patch)
tree225bf78c92e97d0c7016f76f2ba54e42c3fc4171
parent0a4e7cd2374f1d898a25f4ae7d0fb0321433c197 (diff)
downloadfocaccia-qemu-5716990376e22e758c434ba7092b8eacaa148973.tar.gz
focaccia-qemu-5716990376e22e758c434ba7092b8eacaa148973.zip
tcg/x86_64: Special-case all 32-bit AND operands.
This avoids an unnecessary REX.W prefix when dealing with AND
operands that fit into a 32-bit quantity.  The most common change
actually seen is movz[wb]q -> movz[wb]l.

Similarly, avoid REXW in ext{8,16}u_i64 tcg opcodes.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--tcg/x86_64/tcg-target.c26
1 files changed, 8 insertions, 18 deletions
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index 23390914d2..8c7e738180 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -426,24 +426,18 @@ static inline void tgen_arithi64(TCGContext *s, int c, int r0, int64_t val)
     } else if ((c == ARITH_ADD && val == -1) || (c == ARITH_SUB && val == 1)) {
         /* dec */
         tcg_out_modrm(s, 0xff | P_REXW, 1, r0);
-    } else if (val == (int8_t)val) {
-        tcg_out_modrm(s, 0x83 | P_REXW, c, r0);
-        tcg_out8(s, val);
-    } else if (c == ARITH_AND && val == 0xffu) {
-        /* movzbl */
-        tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, r0, r0);
-    } else if (c == ARITH_AND && val == 0xffffu) {
-        /* movzwl */
-        tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, r0, r0);
     } else if (c == ARITH_AND && val == 0xffffffffu) {
         /* 32-bit mov zero extends */
         tcg_out_modrm(s, 0x8b, r0, r0);
+    } else if (c == ARITH_AND && val == (uint32_t)val) {
+        /* AND with no high bits set can use a 32-bit operation.  */
+        tgen_arithi32(s, c, r0, (uint32_t)val);
+    } else if (val == (int8_t)val) {
+        tcg_out_modrm(s, 0x83 | P_REXW, c, r0);
+        tcg_out8(s, val);
     } else if (val == (int32_t)val) {
         tcg_out_modrm(s, 0x81 | P_REXW, c, r0);
         tcg_out32(s, val);
-    } else if (c == ARITH_AND && val == (uint32_t)val) {
-        tcg_out_modrm(s, 0x81, c, r0);
-        tcg_out32(s, val);
     } else {
         tcg_abort();
     }
@@ -1182,16 +1176,12 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
         tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
         break;
     case INDEX_op_ext8u_i32:
+    case INDEX_op_ext8u_i64:
         tcg_out_modrm(s, 0xb6 | P_EXT | P_REXB, args[0], args[1]);
         break;
     case INDEX_op_ext16u_i32:
-        tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
-        break;
-    case INDEX_op_ext8u_i64:
-        tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, args[0], args[1]);
-        break;
     case INDEX_op_ext16u_i64:
-        tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, args[0], args[1]);
+        tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
         break;
     case INDEX_op_ext32u_i64:
         tcg_out_modrm(s, 0x8b, args[0], args[1]);