summary refs log tree commit diff stats
diff options
context:
space:
mode:
authorAlexander Graf <agraf@suse.de>2012-12-08 02:18:58 +0100
committerAlexander Graf <agraf@suse.de>2012-12-14 13:12:56 +0100
commit5bac0701113f4de4fee053a3939b0f569a04b88c (patch)
tree72e8257698b57834684ad45e9566123251613837
parent6d544ee8ac2097c87fc97b53d6a1310d9daa0562 (diff)
downloadfocaccia-qemu-5bac0701113f4de4fee053a3939b0f569a04b88c.tar.gz
focaccia-qemu-5bac0701113f4de4fee053a3939b0f569a04b88c.zip
openpic: remove irq_out
The current openpic emulation contains half-ready code for bypass mode.
Remove it, so that when someone wants to finish it they can start from a
clean state.

Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r--hw/openpic.c8
-rw-r--r--hw/openpic.h4
-rw-r--r--hw/ppc/e500.c2
-rw-r--r--hw/ppc_newworld.c2
4 files changed, 6 insertions, 10 deletions
diff --git a/hw/openpic.c b/hw/openpic.c
index d5c27052e9..5116b3ee4d 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -237,8 +237,6 @@ typedef struct OpenPICState {
         uint32_t ticc;  /* Global timer current count register */
         uint32_t tibc;  /* Global timer base count register */
     } timers[MAX_TMR];
-    /* IRQ out is used when in bypass mode (not implemented) */
-    qemu_irq irq_out;
     int max_irq;
     int irq_ipi0;
     int irq_tim0;
@@ -1051,7 +1049,7 @@ static void openpic_irq_raise(OpenPICState *opp, int n_CPU, IRQ_src_t *src)
 }
 
 qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
-                        qemu_irq **irqs, qemu_irq irq_out)
+                        qemu_irq **irqs)
 {
     OpenPICState *opp;
     int i;
@@ -1100,7 +1098,6 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
 
     for (i = 0; i < nb_cpus; i++)
         opp->dst[i].irqs = irqs[i];
-    opp->irq_out = irq_out;
 
     register_savevm(&opp->pci_dev.qdev, "openpic", 0, 2,
                     openpic_save, openpic_load, opp);
@@ -1113,7 +1110,7 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
 }
 
 qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
-                     int nb_cpus, qemu_irq **irqs, qemu_irq irq_out)
+                     int nb_cpus, qemu_irq **irqs)
 {
     OpenPICState    *mpp;
     int           i;
@@ -1159,7 +1156,6 @@ qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
 
     for (i = 0; i < nb_cpus; i++)
         mpp->dst[i].irqs = irqs[i];
-    mpp->irq_out = irq_out;
 
     /* Enable critical interrupt support */
     mpp->flags |= OPENPIC_FLAG_IDE_CRIT;
diff --git a/hw/openpic.h b/hw/openpic.h
index 1232d1039c..8a68f20d38 100644
--- a/hw/openpic.h
+++ b/hw/openpic.h
@@ -15,7 +15,7 @@ enum {
 #define OPENPIC_FLAG_IDE_CRIT    (1 << 0)
 
 qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
-                        qemu_irq **irqs, qemu_irq irq_out);
+                        qemu_irq **irqs);
 qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
-                     int nb_cpus, qemu_irq **irqs, qemu_irq irq_out);
+                     int nb_cpus, qemu_irq **irqs);
 #endif /* __OPENPIC_H__ */
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index f3e97d8bb5..3f6d58c307 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -493,7 +493,7 @@ void ppce500_init(PPCE500Params *params)
 
     /* MPIC */
     mpic = mpic_init(ccsr_addr_space, MPC8544_MPIC_REGS_OFFSET,
-                     smp_cpus, irqs, NULL);
+                     smp_cpus, irqs);
 
     if (!mpic) {
         cpu_abort(env, "MPIC failed to initialize\n");
diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 664747ead3..b9c2cd8d1d 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -320,7 +320,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args)
             exit(1);
         }
     }
-    pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
+    pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs);
     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
         /* 970 gets a U3 bus */
         pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());