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authorChenyi Qiang <chenyi.qiang@intel.com>2020-07-14 16:41:48 +0800
committerEduardo Habkost <ehabkost@redhat.com>2020-07-16 11:05:03 -0400
commit644e3c5d812d1d672388124eeb43d0e26b3ff58c (patch)
treecde51cd65d0c06c0bd851d9c3884a4875861e6fc
parente0013791b9326945ccd09b5b602437beb322cab8 (diff)
downloadfocaccia-qemu-644e3c5d812d1d672388124eeb43d0e26b3ff58c.tar.gz
focaccia-qemu-644e3c5d812d1d672388124eeb43d0e26b3ff58c.zip
target/i386: add the missing vmx features for Skylake-Server and Cascadelake-Server CPU models
Add the missing vmx features in Skylake-Server and Cascadelake-Server
CPU models based on the output of Paolo's script.

Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
Message-Id: <20200714084148.26690-4-chenyi.qiang@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
-rw-r--r--target/i386/cpu.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 132ef90421..588f32e136 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3034,6 +3034,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ }
                 }
             },
+            {
+                .version = 4,
+                .props = (PropValue[]) {
+                    { "vmx-eptp-switching", "on" },
+                    { /* end of list */ }
+                }
+            },
             { /* end of list */ }
         }
     },
@@ -3158,6 +3165,13 @@ static X86CPUDefinition builtin_x86_defs[] = {
                   { /* end of list */ }
               },
             },
+            { .version = 4,
+              .note = "ARCH_CAPABILITIES, no TSX",
+              .props = (PropValue[]) {
+                  { "vmx-eptp-switching", "on" },
+                  { /* end of list */ }
+              },
+            },
             { /* end of list */ }
         }
     },