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authorAlex Bennée <alex.bennee@linaro.org>2017-02-28 14:35:14 +0000
committerAlex Bennée <alex.bennee@linaro.org>2017-03-09 10:38:02 +0000
commit72c1701f62e8d44eb24a0583a958edc280105455 (patch)
tree4c2cc14c3042f763926b3bdaec016cfba23c3666
parent83fd9629a39ee8a58f1f772a2ca3a7745a4c5743 (diff)
downloadfocaccia-qemu-72c1701f62e8d44eb24a0583a958edc280105455.tar.gz
focaccia-qemu-72c1701f62e8d44eb24a0583a958edc280105455.zip
target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO
This suppresses the incorrect warning when forcing MTTCG for x86
guests on x86 hosts. A future patch will still warn when
TARGET_SUPPORT_MTTCG hasn't been defined for the guest (which is still
pending for x86).

Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
-rw-r--r--target/i386/cpu.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ac2ad6d443..fb09aee7f8 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -30,6 +30,9 @@
 #define TARGET_LONG_BITS 32
 #endif
 
+/* The x86 has a strong memory model with some store-after-load re-ordering */
+#define TCG_GUEST_DEFAULT_MO      (TCG_MO_ALL & ~TCG_MO_ST_LD)
+
 /* Maximum instruction code size */
 #define TARGET_MAX_INSN_SIZE 16