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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-05-27 11:18:33 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-05-30 17:05:09 +0100 |
| commit | 738b679cc961bd086f14d7d7e3f4be116a719810 (patch) | |
| tree | 116eb632eb51c0543b2c53101885a56ba767f6c4 | |
| parent | 23e5fa5f90a6073f270ec89418085e4cb341a4ea (diff) | |
| download | focaccia-qemu-738b679cc961bd086f14d7d7e3f4be116a719810.tar.gz focaccia-qemu-738b679cc961bd086f14d7d7e3f4be116a719810.zip | |
target/arm: Implement NOT (prediates) alias
This alias is defined on EOR (prediates). While the same operation could be performed with NAND or NOR, only bother with the official alias. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220527181907.189259-81-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/translate-sve.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index f33bc9d480..b6b5980e2d 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -1381,6 +1381,11 @@ static bool trans_EOR_pppp(DisasContext *s, arg_rprr_s *a) .fno = gen_helper_sve_eor_pppp, .prefer_i64 = TCG_TARGET_REG_BITS == 64, }; + + /* Alias NOT (predicate) is EOR Pd.B, Pg/Z, Pn.B, Pg.B */ + if (!a->s && a->pg == a->rm) { + return gen_gvec_fn_ppp(s, tcg_gen_gvec_andc, a->rd, a->pg, a->rn); + } return do_pppp_flags(s, a, &op); } |