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authorAlex Zuepke <alexander.zuepke@hs-rm.de>2014-12-12 15:10:27 +0100
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2014-12-21 18:32:03 +0000
commit781b717c5049f42d45d31fd47617f3129c07541c (patch)
treee4dc94a4460147c382763dbdcf8065e14bddb61a
parentc4e7c17a8ecb41cdbb81374a128161c614ba1f1e (diff)
downloadfocaccia-qemu-781b717c5049f42d45d31fd47617f3129c07541c.tar.gz
focaccia-qemu-781b717c5049f42d45d31fd47617f3129c07541c.zip
target-tricore: fix offset masking in BOL format
Signed-off-by: Alex Zuepke <alexander.zuepke@hs-rm.de>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
-rw-r--r--target-tricore/tricore-opcodes.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h
index 0a9122cfb9..70ac5ffc7d 100644
--- a/target-tricore/tricore-opcodes.h
+++ b/target-tricore/tricore-opcodes.h
@@ -114,7 +114,7 @@
 /* BOL Format */
 #define MASK_OP_BOL_OFF16(op)  ((MASK_BITS_SHIFT(op, 16, 21) +        \
                                (MASK_BITS_SHIFT(op, 28, 31) << 6)) + \
-                               (MASK_BITS_SHIFT(op, 22, 27) >> 10))
+                               (MASK_BITS_SHIFT(op, 22, 27) << 10))
 #define MASK_OP_BOL_OFF16_SEXT(op)  ((MASK_BITS_SHIFT(op, 16, 21) +        \
                                     (MASK_BITS_SHIFT(op, 28, 31) << 6)) + \
                                     (MASK_BITS_SHIFT_SEXT(op, 22, 27) << 10))