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authorRichard Henderson <rth@twiddle.net>2013-03-27 14:37:42 -0400
committerRichard Henderson <rth@twiddle.net>2013-04-05 13:35:41 -0500
commit78c9f7c5b09408b4cac69a4fee97a118c8a89f6c (patch)
treeb98cf05a69b5cbff780e884e4b5964f8ac1d56fc
parent0db921e6d8660a2491c173a2821e30924018d4bb (diff)
downloadfocaccia-qemu-78c9f7c5b09408b4cac69a4fee97a118c8a89f6c.tar.gz
focaccia-qemu-78c9f7c5b09408b4cac69a4fee97a118c8a89f6c.zip
tcg-s390: Use all 20 bits of the offset in tcg_out_mem
This can save one insn, if the constant has any bits in 32-63 set,
but no bits in 21-31 set.  It never results in more insns.

Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r--tcg/s390/tcg-target.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 22927dfa26..8e660b318d 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -748,10 +748,11 @@ static void tcg_out_mem(TCGContext *s, S390Opcode opc_rx, S390Opcode opc_rxy,
                         tcg_target_long ofs)
 {
     if (ofs < -0x80000 || ofs >= 0x80000) {
-        /* Combine the low 16 bits of the offset with the actual load insn;
-           the high 48 bits must come from an immediate load.  */
-        tcg_out_movi(s, TCG_TYPE_PTR, TCG_TMP0, ofs & ~0xffff);
-        ofs &= 0xffff;
+        /* Combine the low 20 bits of the offset with the actual load insn;
+           the high 44 bits must come from an immediate load.  */
+        tcg_target_long low = ((ofs & 0xfffff) ^ 0x80000) - 0x80000;
+        tcg_out_movi(s, TCG_TYPE_PTR, TCG_TMP0, ofs - low);
+        ofs = low;
 
         /* If we were already given an index register, add it in.  */
         if (index != TCG_REG_NONE) {