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| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-01-10 17:14:34 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2017-07-04 09:22:20 +0200 |
| commit | 79549c996056ce1ad820061622e71d4a0444d3c7 (patch) | |
| tree | d67bff11b70fbaa3fa9917da589b3cc0b33c4275 | |
| parent | 9a32e6f3a15f4373c9bec8acf5f5436822184247 (diff) | |
| download | focaccia-qemu-79549c996056ce1ad820061622e71d4a0444d3c7.tar.gz focaccia-qemu-79549c996056ce1ad820061622e71d4a0444d3c7.zip | |
target-microblaze: Correct bit shift for the PVR0 version field
Correct bit shift for the PVR0 version field. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| -rw-r--r-- | target/microblaze/cpu.c | 2 | ||||
| -rw-r--r-- | target/microblaze/cpu.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 3d58869716..af70faaa90 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -182,7 +182,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) (cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) | (cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) | (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) | - (version_code << 16) | + (version_code << PVR0_VERSION_SHIFT) | (cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0); env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) | diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index bf6963bcb7..68c33e83e4 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -129,6 +129,8 @@ typedef struct CPUMBState CPUMBState; #define PVR0_USER1_MASK 0x000000FF #define PVR0_SPROT_MASK 0x00000001 +#define PVR0_VERSION_SHIFT 8 + /* User 2 PVR mask */ #define PVR1_USER2_MASK 0xFFFFFFFF |