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| author | Andrew Jones <drjones@redhat.com> | 2019-08-02 14:25:30 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-08-16 14:02:51 +0100 |
| commit | 7b351d98709d3f77d6bb18562e1bf228862b0d57 (patch) | |
| tree | 857c8f067632e4c78455706d66919633a0d8bd17 | |
| parent | ae502508f83e06abddab3ac1a11dd822718472e1 (diff) | |
| download | focaccia-qemu-7b351d98709d3f77d6bb18562e1bf228862b0d57.tar.gz focaccia-qemu-7b351d98709d3f77d6bb18562e1bf228862b0d57.zip | |
target/arm/helper: zcr: Add build bug next to value range assumption
The current implementation of ZCR_ELx matches the architecture, only implementing the lower four bits, with the rest RAZ/WI. This puts a strict limit on ARM_MAX_VQ of 16. Make sure we don't let ARM_MAX_VQ grow without a corresponding update here. Suggested-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 24806c16ca..2fd504ea7a 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5300,6 +5300,7 @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, int new_len; /* Bits other than [3:0] are RAZ/WI. */ + QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16); raw_write(env, ri, value & 0xf); /* |