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authorRichard Henderson <richard.henderson@linaro.org>2024-04-05 17:31:05 -1000
committerRichard Henderson <richard.henderson@linaro.org>2024-04-09 07:43:31 -1000
commit7d95db5e78a24d3315e3112d26909a7262355cb7 (patch)
tree7e3bea464f416c5664d361bb79e73137c65be151
parentb0f2f2976b4db05351117b0440b32bf0aac2c5c6 (diff)
downloadfocaccia-qemu-7d95db5e78a24d3315e3112d26909a7262355cb7.tar.gz
focaccia-qemu-7d95db5e78a24d3315e3112d26909a7262355cb7.zip
target/sh4: Merge mach and macl into a union
Allow host access to the entire 64-bit accumulator.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/sh4/cpu.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 9211da6bde..d928bcf006 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -155,12 +155,22 @@ typedef struct CPUArchState {
     uint32_t pc;                /* program counter */
     uint32_t delayed_pc;        /* target of delayed branch */
     uint32_t delayed_cond;      /* condition of delayed branch */
-    uint32_t mach;              /* multiply and accumulate high */
-    uint32_t macl;              /* multiply and accumulate low */
     uint32_t pr;                /* procedure register */
     uint32_t fpscr;             /* floating point status/control register */
     uint32_t fpul;              /* floating point communication register */
 
+    /* multiply and accumulate: high, low and combined. */
+    union {
+        uint64_t mac;
+        struct {
+#if HOST_BIG_ENDIAN
+            uint32_t mach, macl;
+#else
+            uint32_t macl, mach;
+#endif
+        };
+    };
+
     /* float point status register */
     float_status fp_status;