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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2011-09-28 11:19:02 +0200 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-10-01 06:23:52 +0000 |
| commit | 7e17a217061e402243499d96fc8dec92162d8b4a (patch) | |
| tree | 3588f411db7f62ababe279bbc886fce783bf7488 | |
| parent | 86ce7a5e7eedb7b1f18b24159fde20d47259b619 (diff) | |
| download | focaccia-qemu-7e17a217061e402243499d96fc8dec92162d8b4a.tar.gz focaccia-qemu-7e17a217061e402243499d96fc8dec92162d8b4a.zip | |
mips_fulong2e: Reorder ISA bus and i8259 creation
Missed during memory region conversion: The i8259 now depends on the ISA bus being created first. Reorder the initialization. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | hw/mips_fulong2e.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c index f52b8c5083..04921c147e 100644 --- a/hw/mips_fulong2e.c +++ b/hw/mips_fulong2e.c @@ -331,10 +331,6 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); - /* Interrupt controller */ - /* The 8259 -> IP5 */ - i8259 = i8259_init(env->irq[5]); - /* North bridge, Bonito --> IP2 */ pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); @@ -347,7 +343,11 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, exit(1); } + /* Interrupt controller */ + /* The 8259 -> IP5 */ + i8259 = i8259_init(env->irq[5]); isa_bus_irqs(i8259); + vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1)); usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2)); usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3)); |