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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-12 13:43:27 +0200 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-05-05 10:49:50 +1000 |
| commit | 8d6a00cdc01b912acceb9a03e77ad86fb7954b17 (patch) | |
| tree | f43e231214e94c13494c502ace684f9e6500b76d | |
| parent | a427c83633924d2bc9485d30c2658dd9fc44b9f1 (diff) | |
| download | focaccia-qemu-8d6a00cdc01b912acceb9a03e77ad86fb7954b17.tar.gz focaccia-qemu-8d6a00cdc01b912acceb9a03e77ad86fb7954b17.zip | |
target/riscv: Hoist pbmte and hade out of the level loop
These values are constant for every level of pte lookup. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230325105429.1142530-20-richard.henderson@linaro.org> Message-Id: <20230412114333.118895-20-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/cpu_helper.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 5753e4e612..7c9f89d4d3 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -856,6 +856,14 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical, return TRANSLATE_FAIL; } + bool pbmte = env->menvcfg & MENVCFG_PBMTE; + bool hade = env->menvcfg & MENVCFG_HADE; + + if (first_stage && two_stage && env->virt_enabled) { + pbmte = pbmte && (env->henvcfg & HENVCFG_PBMTE); + hade = hade && (env->henvcfg & HENVCFG_HADE); + } + int ptshift = (levels - 1) * ptidxbits; int i; @@ -916,14 +924,6 @@ restart: return TRANSLATE_FAIL; } - bool pbmte = env->menvcfg & MENVCFG_PBMTE; - bool hade = env->menvcfg & MENVCFG_HADE; - - if (first_stage && two_stage && env->virt_enabled) { - pbmte = pbmte && (env->henvcfg & HENVCFG_PBMTE); - hade = hade && (env->henvcfg & HENVCFG_HADE); - } - if (riscv_cpu_sxl(env) == MXL_RV32) { ppn = pte >> PTE_PPN_SHIFT; } else if (pbmte || riscv_cpu_cfg(env)->ext_svnapot) { |