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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2014-05-29 02:25:03 -0700 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2014-06-09 00:33:03 +0200 |
| commit | 95faaa73dfe705a3c6411d855cdbf099c596ec25 (patch) | |
| tree | ab9fa5a13b8fa61397b633cb9d9e5a2348e0f35d | |
| parent | e8198f6ea0d7770bd7418d4389f3f5df4a5be074 (diff) | |
| download | focaccia-qemu-95faaa73dfe705a3c6411d855cdbf099c596ec25.tar.gz focaccia-qemu-95faaa73dfe705a3c6411d855cdbf099c596ec25.zip | |
char: xilinx_uartlite: Don't reset from init
This refresh of the device state is intended to be a reset side effect. Move it to a proper reset handler rather than do it at init time. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
| -rw-r--r-- | hw/char/xilinx_uartlite.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index b0d1d04af7..d810e5f227 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -87,6 +87,11 @@ static void uart_update_status(XilinxUARTLite *s) s->regs[R_STATUS] = r; } +static void xilinx_uartlite_reset(DeviceState *dev) +{ + uart_update_status(XILINX_UARTLITE(dev)); +} + static uint64_t uart_read(void *opaque, hwaddr addr, unsigned int size) { @@ -202,7 +207,6 @@ static int xilinx_uartlite_init(SysBusDevice *dev) sysbus_init_irq(dev, &s->irq); - uart_update_status(s); memory_region_init_io(&s->mmio, OBJECT(s), &uart_ops, s, "xlnx.xps-uartlite", R_MAX * 4); sysbus_init_mmio(dev, &s->mmio); @@ -216,8 +220,10 @@ static int xilinx_uartlite_init(SysBusDevice *dev) static void xilinx_uartlite_class_init(ObjectClass *klass, void *data) { SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); sdc->init = xilinx_uartlite_init; + dc->reset = xilinx_uartlite_reset; } static const TypeInfo xilinx_uartlite_info = { |