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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2024-01-12 12:53:56 +0000 |
|---|---|---|
| committer | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2024-02-13 19:37:28 +0000 |
| commit | 9655f72c20385a535158540ab1daaf71b9222d68 (patch) | |
| tree | 30299e61804db8629cb1e22c7a99e974941b67e0 | |
| parent | 82003450666e7a91efcb478e7c7d72d3eb679203 (diff) | |
| download | focaccia-qemu-9655f72c20385a535158540ab1daaf71b9222d68.tar.gz focaccia-qemu-9655f72c20385a535158540ab1daaf71b9222d68.zip | |
esp.c: don't raise INTR_BS interrupt in DATA IN phase until TI command issued
In the case where a SCSI command with a DATA IN phase has been issued, the host may preload the FIFO with unaligned bytes before issuing the main DMA transfer. When accumulating data in the FIFO don't raise the INTR_BS interrupt until the TI command is issued, otherwise the unexpected interrupt can confuse the host. In particular this is needed to prevent the MacOS Disk Utility from failing when switching non-DMA transfers to use esp_do_nodma(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-65-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
| -rw-r--r-- | hw/scsi/esp.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index bcebd00831..dd6bf6f033 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -786,6 +786,11 @@ static void esp_do_nodma(ESPState *s) return; } + /* If preloading the FIFO, defer until TI command issued */ + if (s->rregs[ESP_CMD] != CMD_TI) { + return; + } + s->rregs[ESP_RINTR] |= INTR_BS; esp_raise_irq(s); break; |