diff options
| author | Gerd Hoffmann <kraxel@redhat.com> | 2012-05-25 12:53:47 +0200 |
|---|---|---|
| committer | Gerd Hoffmann <kraxel@redhat.com> | 2012-06-07 10:02:20 +0200 |
| commit | 973002c11460efd3c17fe61a76711a103e30e1f9 (patch) | |
| tree | b5a6022137a970ded09d2eed172392e2230c3241 | |
| parent | 5852d3bfe16c85d4dabc4e0d21658fc680a756e5 (diff) | |
| download | focaccia-qemu-973002c11460efd3c17fe61a76711a103e30e1f9.tar.gz focaccia-qemu-973002c11460efd3c17fe61a76711a103e30e1f9.zip | |
uhci: fix irq routing
The multifunction ich9 ehci controller with uhci companions uses a different interrupt pin for each function. The three uhci devices get pins A, B and C, whereas ehci uses pin D. This way the guest can assign different IRQ lines to each controller. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| -rw-r--r-- | hw/usb/hcd-uhci.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 3ea388c8fa..9871e24f50 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -138,6 +138,7 @@ struct UHCIState { /* Interrupts that should be raised at the end of the current frame. */ uint32_t pending_int_mask; + int irq_pin; /* Active packets */ QTAILQ_HEAD(, UHCIQueue) queues; @@ -340,7 +341,7 @@ static void uhci_update_irq(UHCIState *s) } else { level = 0; } - qemu_set_irq(s->dev.irq[3], level); + qemu_set_irq(s->dev.irq[s->irq_pin], level); } static void uhci_reset(void *opaque) @@ -1184,15 +1185,31 @@ static USBBusOps uhci_bus_ops = { static int usb_uhci_common_initfn(PCIDevice *dev) { + PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); UHCIState *s = DO_UPCAST(UHCIState, dev, dev); uint8_t *pci_conf = s->dev.config; int i; pci_conf[PCI_CLASS_PROG] = 0x00; /* TODO: reset value should be 0. */ - pci_conf[PCI_INTERRUPT_PIN] = 4; /* interrupt pin D */ pci_conf[USB_SBRN] = USB_RELEASE_1; // release number + switch (pc->device_id) { + case PCI_DEVICE_ID_INTEL_82801I_UHCI1: + s->irq_pin = 0; /* A */ + break; + case PCI_DEVICE_ID_INTEL_82801I_UHCI2: + s->irq_pin = 1; /* B */ + break; + case PCI_DEVICE_ID_INTEL_82801I_UHCI3: + s->irq_pin = 2; /* C */ + break; + default: + s->irq_pin = 3; /* D */ + break; + } + pci_config_set_interrupt_pin(pci_conf, s->irq_pin + 1); + if (s->masterbus) { USBPort *ports[NB_PORTS]; for(i = 0; i < NB_PORTS; i++) { |