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| author | Fredrik Noring <noring@nocrew.org> | 2018-11-07 20:19:45 +0100 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-11-17 19:29:34 +0100 |
| commit | 992e8176d36882983bb04f0259f7151a36d003a1 (patch) | |
| tree | 1eb6865d5ac8db4272ac6ba204c5dc1cab67e92a | |
| parent | 55fc7a69aa38f5ec726e862caf4e4394caca04a8 (diff) | |
| download | focaccia-qemu-992e8176d36882983bb04f0259f7151a36d003a1.tar.gz focaccia-qemu-992e8176d36882983bb04f0259f7151a36d003a1.zip | |
target/mips: Guard check_insn with INSN_R5900 check
Explicitely mark handling of PREF instruction for R5900 as treating the same as NOP. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
| -rw-r--r-- | target/mips/translate.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index c79da3c2e4..714f2e6be4 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28357,9 +28357,12 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) break; case OPC_PREF: check_insn_opc_removed(ctx, ISA_MIPS32R6); - check_insn(ctx, ISA_MIPS4 | ISA_MIPS32 | - INSN_R5900); - /* Treat as NOP. */ + if (ctx->insn_flags & INSN_R5900) { + /* Treat as NOP. */ + } else { + check_insn(ctx, ISA_MIPS4 | ISA_MIPS32); + /* Treat as NOP. */ + } break; /* Floating point (COP1). */ |