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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-07-11 18:35:59 -0600 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-09-23 16:55:36 -0700 |
| commit | 9ea28805814bedf511baf1635bb2fd0ceefcd638 (patch) | |
| tree | c2be16a3ef08e5b507238935498a1f7f40a70009 | |
| parent | 33ea495cd3bfb21db920b6928af7eda39ced5c20 (diff) | |
| download | focaccia-qemu-9ea28805814bedf511baf1635bb2fd0ceefcd638.tar.gz focaccia-qemu-9ea28805814bedf511baf1635bb2fd0ceefcd638.zip | |
target/hppa: Adjust mmu indexes to begin with 0
This is a logical reversion of 2ad04500543, though there have been additions to the set of mmu indexes since then. The impetus to that original patch, "9-15 will use shorter assembler instructions when run on a x86-64 host" is now handled generically. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/hppa/cpu.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 11d59d11ca..672ab3750c 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -29,21 +29,21 @@ #include "qemu/interval-tree.h" #include "hw/registerfields.h" -#define MMU_ABS_W_IDX 6 -#define MMU_ABS_IDX 7 -#define MMU_KERNEL_IDX 8 -#define MMU_KERNEL_P_IDX 9 -#define MMU_PL1_IDX 10 -#define MMU_PL1_P_IDX 11 -#define MMU_PL2_IDX 12 -#define MMU_PL2_P_IDX 13 -#define MMU_USER_IDX 14 -#define MMU_USER_P_IDX 15 - -#define MMU_IDX_MMU_DISABLED(MIDX) ((MIDX) < MMU_KERNEL_IDX) -#define MMU_IDX_TO_PRIV(MIDX) (((MIDX) - MMU_KERNEL_IDX) / 2) -#define MMU_IDX_TO_P(MIDX) (((MIDX) - MMU_KERNEL_IDX) & 1) -#define PRIV_P_TO_MMU_IDX(PRIV, P) ((PRIV) * 2 + !!(P) + MMU_KERNEL_IDX) +#define MMU_KERNEL_IDX 0 +#define MMU_KERNEL_P_IDX 1 +#define MMU_PL1_IDX 2 +#define MMU_PL1_P_IDX 3 +#define MMU_PL2_IDX 4 +#define MMU_PL2_P_IDX 5 +#define MMU_USER_IDX 6 +#define MMU_USER_P_IDX 7 +#define MMU_ABS_IDX 8 +#define MMU_ABS_W_IDX 9 + +#define MMU_IDX_MMU_DISABLED(MIDX) ((MIDX) >= MMU_ABS_IDX) +#define MMU_IDX_TO_PRIV(MIDX) ((MIDX) / 2) +#define MMU_IDX_TO_P(MIDX) ((MIDX) & 1) +#define PRIV_P_TO_MMU_IDX(PRIV, P) ((PRIV) * 2 + !!(P)) #define PRIV_KERNEL 0 #define PRIV_USER 3 |