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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-13 22:16:57 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:35:13 +0200
commita2de5ca451354155a0d6a9b098cbdd44eabb2da5 (patch)
treeaa306d8eca024ac59c0c97f2dca5b9ac9a82c9c9
parent9e50a927b4e2e724849f6ec19fa55fe40e13d174 (diff)
downloadfocaccia-qemu-a2de5ca451354155a0d6a9b098cbdd44eabb2da5.tar.gz
focaccia-qemu-a2de5ca451354155a0d6a9b098cbdd44eabb2da5.zip
target-microblaze: Bypass MMU with MMU_NOMMU_IDX
Bypass MMU translation when mmu-index MMU_NOMMU_IDX is used.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
-rw-r--r--target/microblaze/helper.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index a9f4ca93e3..261dcc74c7 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -58,7 +58,8 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
     int prot;
 
     /* Translate if the MMU is available and enabled.  */
-    if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)) {
+    if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)
+        && mmu_idx != MMU_NOMMU_IDX) {
         uint32_t vaddr, paddr;
         struct microblaze_mmu_lookup lu;