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authorLeif Lindholm <leif@nuviainc.com>2021-01-08 18:51:51 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-01-12 10:09:14 +0000
commita5fd319ae7f6d496ff5448ec1dedcae8e2f59e9f (patch)
tree1c40530c8c962ca935a910710f5a3a8a401ab745
parentf6450bcb6b2d3e4beae77141edce9e99cb8c277e (diff)
downloadfocaccia-qemu-a5fd319ae7f6d496ff5448ec1dedcae8e2f59e9f.tar.gz
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target/arm: make ARMCPU.ctr 64-bit
When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the
TminLine field in bits [37:32].
Extend the ctr field to be able to hold this context.

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20210108185154.8108-4-leif@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index fdbfcec2b0..0795c4cc06 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -931,7 +931,7 @@ struct ARMCPU {
     uint64_t midr;
     uint32_t revidr;
     uint32_t reset_fpsid;
-    uint32_t ctr;
+    uint64_t ctr;
     uint32_t reset_sctlr;
     uint64_t pmceid0;
     uint64_t pmceid1;