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| author | Richard Henderson <rth@twiddle.net> | 2016-04-05 11:50:16 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-02-14 08:15:00 +1100 |
| commit | a8000cb480c8cfb612b039bf0382c41b9d6c7d45 (patch) | |
| tree | 46ccc9143920f8f7fdb0571cd2a400ce94e87aa3 | |
| parent | 762e22edcd021035e1dbcf0dbc31b4794c5c1027 (diff) | |
| download | focaccia-qemu-a8000cb480c8cfb612b039bf0382c41b9d6c7d45.tar.gz focaccia-qemu-a8000cb480c8cfb612b039bf0382c41b9d6c7d45.zip | |
target/openrisc: Optimize l.jal to next
This allows the tcg optimizer to see, and fold, all of the constants involved in a GOT base register load sequence. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target/openrisc/translate.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 66064e1829..cda84b61cb 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -198,7 +198,11 @@ static void gen_jump(DisasContext *dc, int32_t n26, uint32_t reg, uint32_t op0) tcg_gen_movi_tl(jmp_pc, tmp_pc); break; case 0x01: /* l.jal */ - tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8)); + tcg_gen_movi_tl(cpu_R[9], dc->pc + 8); + /* Optimize jal being used to load the PC for PIC. */ + if (tmp_pc == dc->pc + 8) { + return; + } tcg_gen_movi_tl(jmp_pc, tmp_pc); break; case 0x03: /* l.bnf */ |