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| author | Aurelien Jarno <aurelien@aurel32.net> | 2010-02-08 12:06:05 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-02-08 12:06:05 +0100 |
| commit | add1e7ea6163b11db2fe50937b1fd62339ffa91c (patch) | |
| tree | 09dd44f9810a3d8ee484be3c7a6306c6a9b60784 | |
| parent | 48a402e693cbea9582472159931aa6799a6c80c7 (diff) | |
| download | focaccia-qemu-add1e7ea6163b11db2fe50937b1fd62339ffa91c.tar.gz focaccia-qemu-add1e7ea6163b11db2fe50937b1fd62339ffa91c.zip | |
tcg: add setcondi pseudo-op
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | tcg/tcg-op.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 70a75a08f4..74585f9509 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -1827,6 +1827,14 @@ static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret, tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond); } +static inline void tcg_gen_setcondi_i32(int cond, TCGv_i32 ret, TCGv_i32 arg1, + int32_t arg2) +{ + TCGv_i32 t0 = tcg_const_i32(arg2); + tcg_gen_setcond_i32(cond, ret, arg1, t0); + tcg_temp_free_i32(t0); +} + static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { @@ -1840,6 +1848,14 @@ static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret, #endif } +static inline void tcg_gen_setcondi_i64(int cond, TCGv_i64 ret, TCGv_i64 arg1, + int64_t arg2) +{ + TCGv_i64 t0 = tcg_const_i64(arg2); + tcg_gen_setcond_i64(cond, ret, arg1, t0); + tcg_temp_free_i64(t0); +} + /***************************************/ /* QEMU specific operations. Their type depend on the QEMU CPU type. */ @@ -2113,6 +2129,7 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index) #define tcg_gen_brcond_tl tcg_gen_brcond_i64 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64 #define tcg_gen_setcond_tl tcg_gen_setcond_i64 +#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64 #define tcg_gen_mul_tl tcg_gen_mul_i64 #define tcg_gen_muli_tl tcg_gen_muli_i64 #define tcg_gen_div_tl tcg_gen_div_i64 @@ -2184,6 +2201,7 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index) #define tcg_gen_brcond_tl tcg_gen_brcond_i32 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32 #define tcg_gen_setcond_tl tcg_gen_setcond_i32 +#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32 #define tcg_gen_mul_tl tcg_gen_mul_i32 #define tcg_gen_muli_tl tcg_gen_muli_i32 #define tcg_gen_div_tl tcg_gen_div_i32 |