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authorAurelien Jarno <aurelien@aurel32.net>2010-03-06 18:02:31 +0100
committerAurelien Jarno <aurelien@aurel32.net>2010-03-10 08:43:43 +0100
commitb16f827bdf7444b8cd338b9ecb654b4752f47225 (patch)
tree03ed0f417f2ba6db17a230b5e19430ada973e328
parent1298cb6804d6073ef3cb9c06e663ee59d06d92cc (diff)
downloadfocaccia-qemu-b16f827bdf7444b8cd338b9ecb654b4752f47225.tar.gz
focaccia-qemu-b16f827bdf7444b8cd338b9ecb654b4752f47225.zip
target-i386: fix SIB decoding with index = 4
A SIB byte with an index of 4 means "no scaled index", even if the scale
value is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects
%r12. This is correctly handled by the computation of the index variable,
which includes the index bits, and also the REX.X prefix:

    index = ((code >> 3) & 7) | REX_X(s);

Thanks to Avi Kivity, Jamie Lokier and Malc for the analysis of the
problem and the initial patch.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-i386/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 7a99e2055a..9dafc880bf 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -2047,8 +2047,8 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_
                 gen_op_movl_A0_im(disp);
             }
         }
-        /* XXX: index == 4 is always invalid */
-        if (havesib && (index != 4 || scale != 0)) {
+        /* index == 4 means no index */
+        if (havesib && (index != 4)) {
 #ifdef TARGET_X86_64
             if (s->aflag == 2) {
                 gen_op_addq_A0_reg_sN(scale, index);