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| author | Rajnesh Kanwal <rkanwal@rivosinc.com> | 2025-02-05 11:18:45 +0000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-03-04 15:42:54 +1000 |
| commit | b638f679fede4835474a16cd423cb7e77ff6e7cc (patch) | |
| tree | d16fec2a6a05a2353cb8f22c4fdbd0f7f04370e7 | |
| parent | 4a16a1a7addaafbe65b5a7626cbe880fd9aa0c94 (diff) | |
| download | focaccia-qemu-b638f679fede4835474a16cd423cb7e77ff6e7cc.tar.gz focaccia-qemu-b638f679fede4835474a16cd423cb7e77ff6e7cc.zip | |
target/riscv: Remove obsolete sfence.vm instruction
Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Jason Chien <jason.chien@sifive.com> Message-ID: <20250205-b4-ctr_upstream_v6-v6-1-439d8e06c8ef@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/insn32.decode | 1 | ||||
| -rw-r--r-- | target/riscv/insn_trans/trans_privileged.c.inc | 5 |
2 files changed, 0 insertions, 6 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 942c434c6e..a98dab0205 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -119,7 +119,6 @@ sret 0001000 00010 00000 000 00000 1110011 mret 0011000 00010 00000 000 00000 1110011 wfi 0001000 00101 00000 000 00000 1110011 sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma -sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm # *** NMI *** mnret 0111000 00010 00000 000 00000 1110011 diff --git a/target/riscv/insn_trans/trans_privileged.c.inc b/target/riscv/insn_trans/trans_privileged.c.inc index 73f940d406..27d5558d63 100644 --- a/target/riscv/insn_trans/trans_privileged.c.inc +++ b/target/riscv/insn_trans/trans_privileged.c.inc @@ -147,8 +147,3 @@ static bool trans_sfence_vma(DisasContext *ctx, arg_sfence_vma *a) #endif return false; } - -static bool trans_sfence_vm(DisasContext *ctx, arg_sfence_vm *a) -{ - return false; -} |