diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-06-13 16:24:25 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-29 10:04:57 -0700 |
| commit | b983a0e17240fcbc8e1a32ef44221a1954332c81 (patch) | |
| tree | da8424ff79b9391f5bbafa0338810df781169d41 | |
| parent | 94fdf98721943e79a02a06f4aa3c92f2c8f2e409 (diff) | |
| download | focaccia-qemu-b983a0e17240fcbc8e1a32ef44221a1954332c81.tar.gz focaccia-qemu-b983a0e17240fcbc8e1a32ef44221a1954332c81.zip | |
target/sh4: Improve swap.b translation
Remove TCG_BSWAP_IZ and the preceding zero-extension. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/sh4/translate.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 147219759b..4dcfff81f6 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -676,8 +676,7 @@ static void _decode_opc(DisasContext * ctx) case 0x6008: /* swap.b Rm,Rn */ { TCGv low = tcg_temp_new(); - tcg_gen_ext16u_i32(low, REG(B7_4)); - tcg_gen_bswap16_i32(low, low, TCG_BSWAP_IZ | TCG_BSWAP_OZ); + tcg_gen_bswap16_i32(low, REG(B7_4), 0); tcg_gen_deposit_i32(REG(B11_8), REG(B7_4), low, 0, 16); tcg_temp_free(low); } |