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authorYi Min Zhao <zyimin@linux.vnet.ibm.com>2016-09-06 14:01:29 +0800
committerChristian Borntraeger <borntraeger@de.ibm.com>2016-09-28 13:24:51 +0200
commitbfcec59a23f42dcac18a434bd48bd60d6fc0e563 (patch)
tree081350cda044a5b9bcd2c10b390a64fa7845b051
parent8f95595072c3d91645c21d27cd02dd0b8d920f77 (diff)
downloadfocaccia-qemu-bfcec59a23f42dcac18a434bd48bd60d6fc0e563.tar.gz
focaccia-qemu-bfcec59a23f42dcac18a434bd48bd60d6fc0e563.zip
s390x/pci: code cleanup
Now that each S390 PCI device uses an IO region as MSIX region. The
code in s390_translate_iommu() will never be triggered. Let's remove
it.

Signed-off-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
-rw-r--r--hw/s390x/s390-pci-bus.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index fe5fc4eb16..b7f8bca1fd 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -404,17 +404,6 @@ static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr,
 
     DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
 
-    /* s390 does not have an APIC mapped to main storage so we use
-     * a separate AddressSpace only for msix notifications
-     */
-    if (addr == ZPCI_MSI_ADDR) {
-        ret.iova = addr;
-        ret.translated_addr = addr;
-        ret.addr_mask = 0xfff;
-        ret.perm = IOMMU_RW;
-        return ret;
-    }
-
     if (addr < pbdev->pba || addr > pbdev->pal) {
         return ret;
     }