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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-09-29 15:40:33 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-10-07 03:37:04 +0200 |
| commit | c2cac27dba3db3348563154f9b4b436ecde7b09a (patch) | |
| tree | 1dd6bb9ca1601fd5b06e117094da089ad631b6c9 | |
| parent | ec1eb357cb86eee74d63940154db1e1bfa86026a (diff) | |
| download | focaccia-qemu-c2cac27dba3db3348563154f9b4b436ecde7b09a.tar.gz focaccia-qemu-c2cac27dba3db3348563154f9b4b436ecde7b09a.zip | |
system/physmem: Pass address space argument to cpu_flush_icache_range()
Rename cpu_flush_icache_range() as address_space_flush_icache_range(), passing an address space by argument. The single caller, rom_reset(), already operates on an address space. Use it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20251002084203.63899-7-philmd@linaro.org>
| -rw-r--r-- | hw/core/loader.c | 2 | ||||
| -rw-r--r-- | include/exec/cpu-common.h | 2 | ||||
| -rw-r--r-- | include/system/memory.h | 2 | ||||
| -rw-r--r-- | system/physmem.c | 5 |
4 files changed, 5 insertions, 6 deletions
diff --git a/hw/core/loader.c b/hw/core/loader.c index 524af6f14a..477661a025 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1242,7 +1242,7 @@ static void rom_reset(void *unused) * that the instruction cache for that new region is clear, so that the * CPU definitely fetches its instructions from the just written data. */ - cpu_flush_icache_range(rom->addr, rom->datasize); + address_space_flush_icache_range(rom->as, rom->addr, rom->datasize); trace_loader_write_rom(rom->name, rom->addr, rom->datasize, rom->isrom); } diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 55911c1d9f..2e5aa684e9 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -156,8 +156,6 @@ void cpu_physical_memory_unmap(void *buffer, hwaddr len, */ void qemu_flush_coalesced_mmio_buffer(void); -void cpu_flush_icache_range(hwaddr start, hwaddr len); - typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); diff --git a/include/system/memory.h b/include/system/memory.h index f222743b6f..3bd5ffa5e0 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2995,6 +2995,8 @@ void address_space_cache_invalidate(MemoryRegionCache *cache, */ void address_space_cache_destroy(MemoryRegionCache *cache); +void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len); + /* address_space_get_iotlb_entry: translate an address into an IOTLB * entry. Should be called from an RCU critical section. */ diff --git a/system/physmem.c b/system/physmem.c index c8a1fda55b..018b8f3157 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3212,7 +3212,7 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, return MEMTX_OK; } -void cpu_flush_icache_range(hwaddr addr, hwaddr len) +void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len) { /* * This function should do the same thing as an icache flush that was @@ -3227,8 +3227,7 @@ void cpu_flush_icache_range(hwaddr addr, hwaddr len) RCU_READ_LOCK_GUARD(); while (len > 0) { hwaddr addr1, l = len; - MemoryRegion *mr = address_space_translate(&address_space_memory, - addr, &addr1, &l, true, + MemoryRegion *mr = address_space_translate(as, addr, &addr1, &l, true, MEMTXATTRS_UNSPECIFIED); if (!memory_region_supports_direct_access(mr)) { |