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| author | Tao Su <tao1.su@linux.intel.com> | 2025-01-21 10:06:47 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-01-23 11:50:53 +0100 |
| commit | c597ff5339a9918b00d9f4160126db0ac2a423cc (patch) | |
| tree | 4e53628122285f4383d9de769ab9f4cece6167b8 | |
| parent | 22063f03a7626c77d7a4546b90fd27badd504269 (diff) | |
| download | focaccia-qemu-c597ff5339a9918b00d9f4160126db0ac2a423cc.tar.gz focaccia-qemu-c597ff5339a9918b00d9f4160126db0ac2a423cc.zip | |
target/i386: Introduce SierraForest-v2 model
Update SierraForest CPU model to add LAM, 4 bits indicating certain bits of IA32_SPEC_CTR are supported(intel-psfd, ipred-ctrl, rrsba-ctrl, bhi-ctrl) and the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) Also add GDS-NO and RFDS-NO to indicate the related vulnerabilities are mitigated in stepping 3. Tested-by: Xuelian Guo <xuelian.guo@intel.com> Signed-off-by: Tao Su <tao1.su@linux.intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250121020650.1899618-2-tao1.su@linux.intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/cpu.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b9c11022c..6db8d6c9ba 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4549,6 +4549,25 @@ static const X86CPUDefinition builtin_x86_defs[] = { .model_id = "Intel Xeon Processor (SierraForest)", .versions = (X86CPUVersionDefinition[]) { { .version = 1 }, + { + .version = 2, + .props = (PropValue[]) { + { "ss", "on" }, + { "tsc-adjust", "on" }, + { "cldemote", "on" }, + { "movdiri", "on" }, + { "movdir64b", "on" }, + { "gds-no", "on" }, + { "rfds-no", "on" }, + { "lam", "on" }, + { "intel-psfd", "on"}, + { "ipred-ctrl", "on"}, + { "rrsba-ctrl", "on"}, + { "bhi-ctrl", "on"}, + { "stepping", "3" }, + { /* end of list */ } + } + }, { /* end of list */ }, }, }, |