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| author | Hunter Laux <hunterlaux@gmail.com> | 2014-06-20 04:13:14 -0700 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2014-06-24 20:01:24 +0400 |
| commit | d535508793a8e9389379543ef8d506e50c10cf67 (patch) | |
| tree | c8ba8396f451f41d8364439e7027c5caa046c3a9 | |
| parent | 5f22b054f2594e231b042ada24d2fdfaa9c26d52 (diff) | |
| download | focaccia-qemu-d535508793a8e9389379543ef8d506e50c10cf67.tar.gz focaccia-qemu-d535508793a8e9389379543ef8d506e50c10cf67.zip | |
Add support for the arm breakpoint syscall
OABI arm used a software interrupt(0xef9f0001) for breakpoints. Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI. Apparently Steel Bank Common Lisp still uses the swi instruction. This is the kernel implementation: http://lxr.free-electrons.com/source/arch/arm/kernel/traps.c#L598 Signed-off-by: Hunter Laux <hunterlaux@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| -rw-r--r-- | linux-user/arm/syscall.h | 1 | ||||
| -rw-r--r-- | linux-user/main.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/linux-user/arm/syscall.h b/linux-user/arm/syscall.h index ce2c2a8ed0..e0d2cc3e5d 100644 --- a/linux-user/arm/syscall.h +++ b/linux-user/arm/syscall.h @@ -29,6 +29,7 @@ struct target_pt_regs { #define ARM_THUMB_SYSCALL 0 #define ARM_NR_BASE 0xf0000 +#define ARM_NR_breakpoint (ARM_NR_BASE + 1) #define ARM_NR_cacheflush (ARM_NR_BASE + 2) #define ARM_NR_set_tls (ARM_NR_BASE + 5) diff --git a/linux-user/main.c b/linux-user/main.c index df1bb0e758..900a17fa33 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -806,6 +806,9 @@ void cpu_loop(CPUARMState *env) cpu_set_tls(env, env->regs[0]); env->regs[0] = 0; break; + case ARM_NR_breakpoint: + env->regs[15] -= env->thumb ? 2 : 4; + goto excp_debug; default: gemu_log("qemu: Unsupported ARM syscall: 0x%x\n", n); @@ -849,6 +852,7 @@ void cpu_loop(CPUARMState *env) } break; case EXCP_DEBUG: + excp_debug: { int sig; |