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authorRichard Henderson <richard.henderson@linaro.org>2020-02-18 11:09:52 -0800
committerPeter Maydell <peter.maydell@linaro.org>2020-02-28 16:14:57 +0000
commitdac65ba1d7945c5d58ab63d8769103634adb2b01 (patch)
treeea1542c6287c57bb384c5761d8de78528a8e2a25
parentd8f6d15fd580eec310a3aee9365f206871cadb8d (diff)
downloadfocaccia-qemu-dac65ba1d7945c5d58ab63d8769103634adb2b01.tar.gz
focaccia-qemu-dac65ba1d7945c5d58ab63d8769103634adb2b01.zip
target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfn
We had set this for aarch32-only in arm_max_initfn, but
failed to set the same bit for aarch64.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200218190958.745-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/cpu64.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 0929401a4d..db695384eb 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -704,6 +704,7 @@ static void aarch64_max_initfn(Object *obj)
         cpu->isar.id_mmfr3 = u;
 
         u = cpu->isar.id_mmfr4;
+        u = FIELD_DP32(u, ID_MMFR4, HPDS, 1); /* AA32HPD */
         u = FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
         cpu->isar.id_mmfr4 = u;