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| author | Stefan Weil <sw@weilnetz.de> | 2012-03-02 23:30:05 +0100 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-03-03 18:10:21 +0000 |
| commit | dba4f1bcc3d45384238864d006b0a83788b56a65 (patch) | |
| tree | b5dec34abebcc7f2630889166d712088625fb95e | |
| parent | f57a51603987a600952113103bbd777333a2737a (diff) | |
| download | focaccia-qemu-dba4f1bcc3d45384238864d006b0a83788b56a65.tar.gz focaccia-qemu-dba4f1bcc3d45384238864d006b0a83788b56a65.zip | |
w64: Change data type of parameters for flush_icache_range
The TCG targets i386 and tci needed a change of the function prototype for w64. This change is currently not needed for the other TCG targets, but it can be applied to avoid code differences. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | tcg/arm/tcg-target.h | 3 | ||||
| -rw-r--r-- | tcg/hppa/tcg-target.h | 4 | ||||
| -rw-r--r-- | tcg/ia64/tcg-target.h | 3 | ||||
| -rw-r--r-- | tcg/mips/tcg-target.h | 3 | ||||
| -rw-r--r-- | tcg/s390/tcg-target.h | 3 | ||||
| -rw-r--r-- | tcg/sparc/tcg-target.h | 3 |
6 files changed, 13 insertions, 6 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 0035b471fe..f90b834795 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -81,7 +81,8 @@ enum { TCG_AREG0 = TCG_REG_R6, }; -static inline void flush_icache_range(unsigned long start, unsigned long stop) +static inline void flush_icache_range(tcg_target_ulong start, + tcg_target_ulong stop) { #if QEMU_GNUC_PREREQ(4, 1) __builtin___clear_cache((char *) start, (char *) stop); diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h index 7f3c4cc3e5..d4bf6fe756 100644 --- a/tcg/hppa/tcg-target.h +++ b/tcg/hppa/tcg-target.h @@ -107,7 +107,9 @@ typedef enum { /* Note: must be synced with dyngen-exec.h */ #define TCG_AREG0 TCG_REG_R17 -static inline void flush_icache_range(unsigned long start, unsigned long stop) + +static inline void flush_icache_range(tcg_target_ulong start, + tcg_target_ulong stop) { start &= ~31; while (start <= stop) { diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h index c388089004..0631b9f180 100644 --- a/tcg/ia64/tcg-target.h +++ b/tcg/ia64/tcg-target.h @@ -146,7 +146,8 @@ typedef enum { /* Guest base is supported */ #define TCG_TARGET_HAS_GUEST_BASE -static inline void flush_icache_range(unsigned long start, unsigned long stop) +static inline void flush_icache_range(tcg_target_ulong start, + tcg_target_ulong stop) { start = start & ~(32UL - 1UL); stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL); diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 477bc38b01..d3c804d9a4 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -108,7 +108,8 @@ typedef enum { #include <sys/cachectl.h> #endif -static inline void flush_icache_range(unsigned long start, unsigned long stop) +static inline void flush_icache_range(tcg_target_ulong start, + tcg_target_ulong stop) { cacheflush ((void *)start, stop-start, ICACHE); } diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index e4cd6418a9..d12f90b705 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -100,6 +100,7 @@ enum { TCG_AREG0 = TCG_REG_R10, }; -static inline void flush_icache_range(unsigned long start, unsigned long stop) +static inline void flush_icache_range(tcg_target_ulong start, + tcg_target_ulong stop) { } diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index c3fe131119..ee2274d595 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -134,7 +134,8 @@ typedef enum { #define TCG_AREG0 TCG_REG_G6 #endif -static inline void flush_icache_range(unsigned long start, unsigned long stop) +static inline void flush_icache_range(tcg_target_ulong start, + tcg_target_ulong stop) { unsigned long p; |