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| author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-08-28 18:26:49 +0200 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-08-29 12:07:26 +0200 |
| commit | dbbf08b2892a7cf93e47f84c512953234a452cec (patch) | |
| tree | 8505113c5928434dc58e32cb3962701d5c8a0117 | |
| parent | 1176b328c310dbc71501f370fe128786edc7609c (diff) | |
| download | focaccia-qemu-dbbf08b2892a7cf93e47f84c512953234a452cec.tar.gz focaccia-qemu-dbbf08b2892a7cf93e47f84c512953234a452cec.zip | |
target/mips: Clean up handling of CP0 register 26
Clean up handling of CP0 register 26. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1567009614-12438-26-git-send-email-aleksandar.markovic@rt-rk.com>
| -rw-r--r-- | target/mips/cpu.h | 2 | ||||
| -rw-r--r-- | target/mips/translate.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 168a6d7cdc..40b7cc6804 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -423,7 +423,7 @@ typedef struct mips_def_t mips_def_t; #define CP0_REG25__PERFCTL3 6 #define CP0_REG25__PERFCNT3 7 /* CP0 Register 26 */ -#define CP0_REG00__ERRCTL 0 +#define CP0_REG26__ERRCTL 0 /* CP0 Register 27 */ #define CP0_REG27__CACHERR 0 /* CP0 Register 28 */ diff --git a/target/mips/translate.c b/target/mips/translate.c index 84aabf6b58..a8ea9525dd 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7456,7 +7456,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_26: switch (sel) { - case 0: + case CP0_REG26__ERRCTL: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_ErrCtl)); register_name = "ErrCtl"; break; @@ -8213,7 +8213,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_26: switch (sel) { - case 0: + case CP0_REG26__ERRCTL: gen_helper_mtc0_errctl(cpu_env, arg); ctx->base.is_jmp = DISAS_STOP; register_name = "ErrCtl"; @@ -8944,7 +8944,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_26: switch (sel) { - case 0: + case CP0_REG26__ERRCTL: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_ErrCtl)); register_name = "ErrCtl"; break; @@ -9683,7 +9683,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_26: switch (sel) { - case 0: + case CP0_REG26__ERRCTL: gen_helper_mtc0_errctl(cpu_env, arg); ctx->base.is_jmp = DISAS_STOP; register_name = "ErrCtl"; |