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| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-06-03 23:09:49 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2015-06-05 01:37:59 +0200 |
| commit | df46283ce7be962002a30140a91ffbb56832cc2d (patch) | |
| tree | 5d072bce39a95235643b7c9335bb99872a435260 | |
| parent | 3f4de6756cd87b508b37c7ffa93f7b827832c4eb (diff) | |
| download | focaccia-qemu-df46283ce7be962002a30140a91ffbb56832cc2d.tar.gz focaccia-qemu-df46283ce7be962002a30140a91ffbb56832cc2d.zip | |
target-s390x: implement LPDFR and LNDFR instructions
This complete the floating point support sign handling facility. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | target-s390x/insn-data.def | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index e638b0ba83..41b5f43d53 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -451,6 +451,7 @@ C(0xb301, LNEBR, RRE, Z, 0, e2, new, e1, nabsf32, f32) C(0xb311, LNDBR, RRE, Z, 0, f2_o, f1, 0, nabsf64, f64) C(0xb341, LNXBR, RRE, Z, 0, x2_o, x1, 0, nabsf128, f128) + C(0xb371, LNDFR, RRE, FPSSH, 0, f2_o, f1, 0, nabsf64, 0) /* LOAD ON CONDITION */ C(0xb9f2, LOCR, RRF_c, LOC, r1, r2, new, r1_32, loc, 0) C(0xb9e2, LOCGR, RRF_c, LOC, r1, r2, r1, 0, loc, 0) @@ -464,6 +465,7 @@ C(0xb300, LPEBR, RRE, Z, 0, e2, new, e1, absf32, f32) C(0xb310, LPDBR, RRE, Z, 0, f2_o, f1, 0, absf64, f64) C(0xb340, LPXBR, RRE, Z, 0, x2_o, x1, 0, absf128, f128) + C(0xb370, LPDFR, RRE, FPSSH, 0, f2_o, f1, 0, absf64, 0) /* LOAD REVERSED */ C(0xb91f, LRVR, RRE, Z, 0, r2_32u, new, r1_32, rev32, 0) C(0xb90f, LRVGR, RRE, Z, 0, r2_o, r1, 0, rev64, 0) |