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| author | Aurelien Jarno <aurelien@aurel32.net> | 2010-03-01 22:33:49 +0100 |
|---|---|---|
| committer | Andrzej Zaborowski <balrog@zabor.org> | 2010-03-02 22:19:26 +0100 |
| commit | e0404769facf1a009b94a53c076adb02bfda48ad (patch) | |
| tree | 962710a39dbe1a8ae3dea0d5f4572b17242eb070 | |
| parent | f72a6cd7c71d1220fb34e6d7325988429df5f267 (diff) | |
| download | focaccia-qemu-e0404769facf1a009b94a53c076adb02bfda48ad.tar.gz focaccia-qemu-e0404769facf1a009b94a53c076adb02bfda48ad.zip | |
tcg/arm: implement setcond2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
| -rw-r--r-- | tcg/arm/tcg-target.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 9a76ecb845..d743dbcb72 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1539,6 +1539,16 @@ static inline void tcg_out_op(TCGContext *s, int opc, tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(args[3])], ARITH_MOV, args[0], 0, 0); break; + case INDEX_op_setcond2_i32: + /* See brcond2_i32 comment */ + tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, + args[2], args[4], SHIFT_IMM_LSL(0)); + tcg_out_dat_reg(s, COND_EQ, ARITH_CMP, 0, + args[1], args[3], SHIFT_IMM_LSL(0)); + tcg_out_dat_imm(s, tcg_cond_to_arm_cond[args[5]], + ARITH_MOV, args[0], 0, 1); + tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(args[5])], + ARITH_MOV, args[0], 0, 0); case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, COND_AL, args, 0); @@ -1643,6 +1653,7 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_add2_i32, { "r", "r", "r", "r", "r", "r" } }, { INDEX_op_sub2_i32, { "r", "r", "r", "r", "r", "r" } }, { INDEX_op_brcond2_i32, { "r", "r", "r", "r" } }, + { INDEX_op_setcond2_i32, { "r", "r", "r", "r", "r" } }, { INDEX_op_qemu_ld8u, { "r", "x", "X" } }, { INDEX_op_qemu_ld8s, { "r", "x", "X" } }, |