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authorAlex Bennée <alex.bennee@linaro.org>2019-09-19 14:18:41 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-09-27 11:41:32 +0100
commite267255957fc82db47f96da1ff56409093b824e4 (patch)
treed71c7fd1335db39593d9f87e5baa9a2b5ee971fb
parented6e6ba9c4c0539e4f9ef534bc88d487262a9063 (diff)
downloadfocaccia-qemu-e267255957fc82db47f96da1ff56409093b824e4.tar.gz
focaccia-qemu-e267255957fc82db47f96da1ff56409093b824e4.zip
target/arm: remove run-time semihosting checks for linux-user
Now we do all our checking at translate time we can make cpu_loop a
little bit simpler. We also introduce a simple linux-user semihosting
test case to defend the functionality. The out-of-tree softmmu based
semihosting tests are still more comprehensive.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20190913151845.12582-6-alex.bennee@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--linux-user/arm/cpu_loop.c3
-rw-r--r--linux-user/arm/target_syscall.h3
2 files changed, 0 insertions, 6 deletions
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index 8d65de5b9f..e28c45cd4a 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -325,9 +325,6 @@ void cpu_loop(CPUARMState *env)
 
                 if (n == ARM_NR_cacheflush) {
                     /* nop */
-                } else if (n == ARM_NR_semihosting
-                           || n == ARM_NR_thumb_semihosting) {
-                    env->regs[0] = do_arm_semihosting (env);
                 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
                     /* linux syscall */
                     if (env->thumb || n == 0) {
diff --git a/linux-user/arm/target_syscall.h b/linux-user/arm/target_syscall.h
index afc0772e19..f85cbdaf56 100644
--- a/linux-user/arm/target_syscall.h
+++ b/linux-user/arm/target_syscall.h
@@ -18,9 +18,6 @@ struct target_pt_regs {
 #define ARM_NR_set_tls	  (ARM_NR_BASE + 5)
 #define ARM_NR_get_tls    (ARM_NR_BASE + 6)
 
-#define ARM_NR_semihosting	  0x123456
-#define ARM_NR_thumb_semihosting  0xAB
-
 #if defined(TARGET_WORDS_BIGENDIAN)
 #define UNAME_MACHINE "armv5teb"
 #else