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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-09-25 17:11:26 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-10-07 11:26:10 +0100 |
| commit | e2c25b123d48a9bb2d723f19a595914690e348b0 (patch) | |
| tree | 47cdfebc59f107782bf0cec794457014eac9943b | |
| parent | 0407192ae6a06d649d693a9be5e864243e6de702 (diff) | |
| download | focaccia-qemu-e2c25b123d48a9bb2d723f19a595914690e348b0.tar.gz focaccia-qemu-e2c25b123d48a9bb2d723f19a595914690e348b0.zip | |
target/arm: Add GPCCR fields from ARM revision L.b
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-id: 20250926001134.295547-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 2b9585dc80..41414ac22b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1995,13 +1995,19 @@ FIELD(V7M_VPR, MASK01, 16, 4) FIELD(V7M_VPR, MASK23, 20, 4) FIELD(GPCCR, PPS, 0, 3) +FIELD(GPCCR, RLPAD, 5, 1) +FIELD(GPCCR, NSPAD, 6, 1) +FIELD(GPCCR, SPAD, 7, 1) FIELD(GPCCR, IRGN, 8, 2) FIELD(GPCCR, ORGN, 10, 2) FIELD(GPCCR, SH, 12, 2) FIELD(GPCCR, PGS, 14, 2) FIELD(GPCCR, GPC, 16, 1) FIELD(GPCCR, GPCP, 17, 1) +FIELD(GPCCR, TBGPCD, 18, 1) +FIELD(GPCCR, NSO, 19, 1) FIELD(GPCCR, L0GPTSZ, 20, 4) +FIELD(GPCCR, APPSAA, 24, 1) FIELD(MFAR, FPA, 12, 40) FIELD(MFAR, NSE, 62, 1) |