diff options
| author | Warner Losh <imp@bsdimp.com> | 2021-09-23 08:57:14 -0600 |
|---|---|---|
| committer | Warner Losh <imp@bsdimp.com> | 2022-01-07 22:58:51 -0700 |
| commit | ef1412bd84cd384ee4be34139f750e789ad0f12f (patch) | |
| tree | 74b7f44b145e65c2af295bca535b35ca9b0bd2c1 | |
| parent | 70985aec1c29e34e1de1aec684324073d76d5873 (diff) | |
| download | focaccia-qemu-ef1412bd84cd384ee4be34139f750e789ad0f12f.tar.gz focaccia-qemu-ef1412bd84cd384ee4be34139f750e789ad0f12f.zip | |
bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
Implement EXCP_PREFETCH_ABORT AND EXCP_DATA_ABORT. Both of these data exceptions cause a SIGSEGV. Signed-off-by: Kyle Evans <kevans@FreeBSD.org> Signed-off-by: Olivier Houchard <cognet@ci0.org> Signed-off-by: Stacey Son <sson@FreeBSD.org> Signed-off-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Kyle Evans <kevans@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | bsd-user/arm/target_arch_cpu.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h index 9f9b380b13..905a5ffaff 100644 --- a/bsd-user/arm/target_arch_cpu.h +++ b/bsd-user/arm/target_arch_cpu.h @@ -65,6 +65,17 @@ static inline void target_cpu_loop(CPUARMState *env) case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; + case EXCP_PREFETCH_ABORT: + /* See arm/arm/trap.c prefetch_abort_handler() */ + case EXCP_DATA_ABORT: + /* See arm/arm/trap.c data_abort_handler() */ + info.si_signo = TARGET_SIGSEGV; + info.si_errno = 0; + /* XXX: check env->error_code */ + info.si_code = 0; + info.si_addr = env->exception.vaddress; + queue_signal(env, info.si_signo, &info); + break; case EXCP_DEBUG: { |